emmc和ufs的区别_ufs和emmc使用差别 什么是eMMC和UFS？　　日常选机大家往往关注64GB、128GB等存储空间，却很少像选笔记本关注SSD一样关注手机闪存规格。首先手机储存容量、固态硬盘（SSD）、U盘和SD卡等使用的都是一种叫做NAND的储存介质，NAND闪存是一种非易失性存储技术，即断电后仍能保存数据。它的发展目标就是降低每比特存储成本、提高存储容量。　　无论是eMMC还是UFS都是在NAND存储芯片的基础上，再加上了控制芯片，接入标准接口，进行标准封装，形成一个高度集成的储存模块。　　手机闪存的设计概念，就是为了简化手机内存储器的使用，将NAND Flash芯片和控制芯片设计成1颗MCP芯片，手机客户只需要采购芯片，不需要处理其它繁琐的NAND Flash兼容性和管理问题。　　　　eMMC和UFS都是面向移动端闪存的标准，其中eMMC全称为“embedded Multi Media Card”，即嵌入式的多媒体存储卡，eMMC从eMMC4.3一路发展到4.4、4.5直到现在的5.0、5.1，传输速度也从50MB/s一路狂飙到200MB/s直到现在eMMC5.1的600MB/s，不过实际使用中读取速率都会低于低于理论值，比如搭载eMMC5.1的手机一般读取速度在250MB/s。　　不过对于eMMC来说600MB/s已经是极限，通过并行接口提升接口速率越发困难，接口串行提供了更高速率的可能，这就是后来的UFS标准。UFS使用高速串行接口替代了并行接口，改用了全双工方式，收发数据可以同时进行。　　相比eMMC，JEDEC发布了全新的USF 2.0标准在接口速率上提升不少，全新的USF 2.0有两个版本，其中UFS 2.0 HS-G2的理论带宽为5.8Gbps，大约740MB/s，更快速的UFS 2.1 HS-G3的理论带宽更是达到了11.6Gbps，约1.5GB/s。　　emmc和ufs的区别_ufs和emmc使用差别　　上面这张图很好的反映出了eMMC和UFS两种规格之间的速率差异，而关于手机闪存带宽的提升并没有停止，根据路线图，明年我们有望在手机上UFS3.0的身影，其带宽峰值将超过2.4GB/s。　　截至目前，大多数手机会采用eMMC存储接口，但是我们看到eMMC本身存在速率瓶颈，比如不能同时读写，也就是我们在连接电脑导图片的时候，并没有办法同时往手机拷贝数据，另外在传一些大体积的数据时，往往带宽的限制会很慢。　　emmc和ufs的区别_ufs和emmc使用差别　　而UFS2.X接口无论在性能和速率上都更胜一筹，并真正在改善移动设备的操作体验。如果用一个词来UFS接口带来改善，那就是更快的响应能力。　　最新的Android系统已经根据UFS2.0的多线程读取能力进行了优化，一个最直观的变化是我们的手机在读取文件上花费的时间会更少，另外打开应用程序的时间也变短，一旦软件开发人员优化各自的App，充分利用UFS，这种移动体验就会持续得到改善。总而言之UFS2.0的存在让我们的手机看起来反应更快。　　实测体验ufs和emmc哪个好？　　前面我们提到UFS比eMMC可以提升文件读写速度，应用到实际使用中主要表现为手机解压大型游戏和加载大型游戏的时间会变短。除了这些，使用会更快的UFS接口的手机要比eMMC在实际表现的差异还是比较明显的，下面这段视频可以很清晰的表现出两种规格的差异。　　多任务执行响应速度更快　　拥有UFS2.0接口手机，LVDS（低压差分信号）有专门串行接口，读写操作同时进行； CQ（命令）队列动态调配任务，无需等待上一进程结束。相反eMMC接口的手机读写必须分开执行，指令也是打包的，在速度上就已经是略逊一筹，在执行多任务时eMMC自然要慢一步。　　　　低延迟，UFS响应速度快3倍　　在读取大型游戏以及大体积文件时，UFS2.0所需时间更短，载入一款游戏所需要的时间为eMMC5.0的1/3，相应在体验游戏时UFS2.0的手机延迟更低，画面更流畅。　　　　连续快拍的照片写入更快　　UFS和eMMC体验上的区别还在连续拍照上，连续拍照时UFS让照片写入更快，从下面的对比可以看出，不同接口标准的手机在连续拍照时，因为写入速度的限制eMMC拍摄时从按下快门到存储一张照片花费的时间更长，而UFS缩短了存储时间从而可以让我们可以在同一时间内抓拍到更多照片。　　　　相册图片缩略图载入时间更短　　这一点相信大家深有体会，很多人的手机装满了几百张甚至上千张照片，当你打开相册的图片缩略图很明显的看到加载的过程，这就是手机在读取闪存中的照片时更不上刷新的速度造成的。优秀的手机屏幕时画面会随着滑动流畅载入，而差一点的手机就会明显体会到加载时的卡顿。　　　　UFS缩略图载入速度更快　　　　速度快了 功耗也更低　　UFS接口在提升了速率之后，也就意味着在相同的任务面前它所花费的时间更短，更高的效率意味着更低的功耗。在同时工作的时候UFS的功耗要比eMMC低出10%，日常工作中大约能省35%的功耗，这对于目前的智能手机续航无疑是更好的选择。　　　　总结：移动设备闪存使用UFS接口标准无论性能、功耗各方面都要优于eMMC，协同处理器让我们的手机在应对更多场景时不会卡顿，购买移动设备时选择UFS闪存的产品在未来5G数据狂潮的年代，显然更有价值。

STM32MCU量产工具：STM32 Batch Programmer 写在最前面由于本人从事嵌入式开发（STM32方向），公司产品多数都为STM32芯片，面对批量芯片烧录工作实在麻烦（未送寄焊厂烧录），于是本人根据公司、同事及自己的想法，利用工作之余编写了STM32 Batch Programmer用于STM32的批量烧录管理软件。软件已经过一段时间的使用验证，其对芯片量产或者批量更改程序帮助非常大，故分享出Demo版本给大家使用（由于版权关系不得不发布Demo版），由于本人水平有限，其中bug在所难免，希望大家包涵，如有BUG或想法可以在评论中提出。STM32 Batch Programmer简介STM32 Batch Programmer是一款非常强大的STM32量产烧录软件，支持传统ISP（UART）与STLink(SWD模式)批量烧录。烧录功能除了程序烧录、全片擦除、读取验证、跳转运行这些最基本的功能之外，还支持多Hex程序拼接（如:APP程序段与IAP程序段拼接）、设置/关闭芯片读保护、芯片数据读取导出（仅限STLink）、STM32系列芯片Flash信息查询（查看Flash扇区分布、分析程序占用区）等拓展功能。操作系统支持：Windows 7 x64、Windows 10 x64；Windows XP\Windows 7 x86\Windows 10 x86（部分功能无法使用）。显示屏幕DPI支持： 低分辨率DPI：100%(1x) 125%(1x) ；高分辨率DPI：150%(2x) 175%(2x)。启动界面STM32 Batch Programmer的使用STLink烧录拖动HEX文件至HEX文件路径编辑框，点击所需的烧录参数，选择完成后单机装载参数，提示装载成功后，单击开始全部任务即开始烧录，窗口中显示各个设备的烧录进度信息，最多支持10个设备同时烧录（Demo版本最多支持2设备）。ISP(UART)烧录拖动HEX文件至HEX文件路径编辑框，点击所需的烧录参数，选择完成后单机装载参数，提示装载成功后，选择要进行烧录的端口,单击开始全部任务即开始烧录，窗口中显示各个设备的烧录进度信息，最多支持10个设备同时烧录（Demo版本最多支持2设备、限制波特率为57600）。MCU FLASH读取单击“读取FLSH”按钮即可读取STM32芯片FLASH（前提是FLASH未开启读保护），之后单击“保存文件”保存为HEX或BIN文件。查询MCU的FLASH信息设定MCU列表排序类型，选择查看到MCU系列，选择FLASH配置模式（STM32的FLASH部分型号拥有DUAL BANK配置模式），拖入HEX文件查看占用扇区，可多类型程序文件拼接。软件下载2020-09-25 V2.0.0.1 更新日志 修复BUG： 修复无法读取大于419430Byte(409KB)的文件,并提升最大读取文件大小为8MB 感谢尊重原创的你！V2.0.0.1 蓝奏云下载链接 (压缩包默认解压密码：SundayRX)V2.0.0.1 百度云下载链接提取码：7w6g (压缩包默认解压密码：SundayRX)————————————————版权声明：本文为CSDN博主「SundayRX」的原创文章，遵循CC 4.0 BY-SA版权协议，转载请附上原文出处链接及本声明。原文链接：https://blog.csdn.net/qq_33212020/article/details/103422711

如何使用vsCode+Icarus verilog+GTKwave编写并仿真verilog 用VS Code + iverilog + GTKwave仿真Verilog【下载地址】用VSCodeiverilogGTKwave仿真Verilog分享用VS Code + iverilog + GTKwave仿真Verilog本资源文件提供了一个详细的教程，指导如何在VS Code中使用iverilog和GTKwave工具进行Verilog代码的仿真 项目地址: https://gitcode.com/Resource-Bundle-Collection/9dfab本资源文件提供了一个详细的教程，指导如何在VS Code中使用iverilog和GTKwave工具进行Verilog代码的仿真。通过本教程，您将学会如何配置VS Code环境，编写和编译Verilog代码，并使用GTKwave查看仿真波形。内容概述VS Code部分安装VS Code并配置Verilog插件。创建Verilog源代码文件并进行编辑。iverilog部分下载并安装iverilog编译器。使用iverilog编译Verilog代码生成VVP文件。GTKwave部分使用GTKwave查看仿真生成的VCD文件。调整波形显示以方便分析。使用步骤安装VS Code首先，下载并安装VS Code。安装完成后，打开VS Code并安装Verilog插件，以便在编辑Verilog代码时获得语法高亮和错误检查功能。编写Verilog代码在VS Code中创建一个新的Verilog文件，编写您的Verilog代码。您可以参考教程中的示例代码，编写一个简单的计数器模块。编写测试文件创建一个测试文件（testbench），用于测试您的Verilog模块。测试文件中应包含初始化代码、时钟生成代码以及仿真结束的控制代码。编译Verilog代码使用iverilog编译器将Verilog代码和测试文件编译成VVP文件。编译命令如下：iverilog -o "test_tb.vvp" test_tb.v test.v运行仿真在命令行中运行生成的VVP文件，生成VCD波形文件：vvp test_tb.vvp查看波形使用GTKwave打开生成的VCD文件，查看仿真波形。您可以通过调整波形显示来分析仿真结果。注意事项确保iverilog和GTKwave已正确安装并配置好环境变量。在编写Verilog代码时，注意模块的输入输出定义和时序逻辑的正确性。在仿真过程中，可以通过调整测试文件中的参数来验证不同条件下的仿真结果。通过本教程，您将能够熟练使用VS Code、iverilog和GTKwave进行Verilog代码的仿真，为硬件设计提供强大的支持。【下载地址】用VSCodeiverilogGTKwave仿真Verilog分享用VS Code + iverilog + GTKwave仿真Verilog本资源文件提供了一个详细的教程，指导如何在VS Code中使用iverilog和GTKwave工具进行Verilog代码的仿真 项目地址: https://gitcode.com/Resource-Bundle-Collection/9dfab————————————————版权声明：本文为CSDN博主「邱蒙励」的原创文章，遵循CC 4.0 BY-SA版权协议，转载请附上原文出处链接及本声明。原文链接：https://blog.csdn.net/gitblog_06576/article/details/143385319

Vscode自动生成verilog例化 前言veirlog模块例化的时候，辣么多的信号端子，手动例化又慢又容易出错，葵花妈妈开课啦，孩子手残老犯错怎么办？当然是脚本一劳永逸，妈妈再也不担心手残党。流程（1）在vscode中安装如下插件。（2）在电脑中安装python3以上的环境。下载地址：https://www.python.org/downloads/release/python-373/安装记得一定要勾选添加路径，记得管理员安装。重启你的电脑。在cmd窗口输入python即可验证是否安装成功！（3）安装chardet。为确保插件可用，这个需要安装。参考链接：https://blog.csdn.net/sinat_28631741/article/details/80483064方式一 源码按照：第一步：下载压缩文件，例如： 'chardet-3.0.4.tar.gz'； 第二步：解压文件到python安装位置下的‘site-packages’目录下，例如：‘D:\python2.7\Lib\site-packages’； 第三步：打开终端命令窗口，进入解压的‘chardet’目录下，执行命令：python setup.py install （4）修改插件的原始py文件，觉得开发者的py有瑕疵，让帅气的同事重新整了个，把以下代码替换进原始py文件即可。在打开v文件的vscode下按ctrl+p，输入instance可出现下述界面。替换此py文件的代码即可。 #! /usr/bin/env python ''' vTbgenerator.py -- generate verilog module Testbench generated bench file like this: fifo_sc #( .DATA_WIDTH ( 8 ), .ADDR_WIDTH ( 8 ) ) u_fifo_sc ( .CLK ( CLK ), .RST_N ( RST_N ), .RD_EN ( RD_EN ), .WR_EN ( WR_EN ), .DIN ( DIN [DATA_WIDTH-1 :0] ), .DOUT ( DOUT [DATA_WIDTH-1 :0] ), .EMPTY ( EMPTY ), .FULL ( FULL ) ); Usage: python vTbgenerator.py ModuleFileName.v ''' import random import re import sys from queue import Queue import chardet def delComment(Text): """ removed comment """ single_line_comment = re.compile(r"//(.*)$", re.MULTILINE) multi_line_comment = re.compile(r"/\*(.*?)\*/", re.DOTALL) Text = multi_line_comment.sub('\n', Text) Text = single_line_comment.sub('\n', Text) return Text def delBlock(Text): """ removed task and function block """ Text = re.sub(r'\Wtask\W[\W\w]*?\Wendtask\W', '\n', Text) Text = re.sub(r'\Wfunction\W[\W\w]*?\Wendfunction\W', '\n', Text) return Text def findName(inText): """ find module name and port list""" p = re.search(r'([a-zA-Z_][a-zA-Z_0-9]*)\s*', inText) mo_Name = p.group(0).strip() return mo_Name def paraDeclare(inText, portArr): """ find parameter declare """ pat = r'\s' + portArr + r'\s[\w\W]*?[;,)]' ParaList = re.findall(pat, inText) return ParaList def portDeclare(inText, portArr): """find port declare, Syntax: input [ net_type ] [ signed ] [ range ] list_of_port_identifiers return list as : (port, [range]) """ port_definition = re.compile( r'\b' + portArr + r''' (\s+(wire|reg)\s+)* (\s*signed\s+)* (\s*\[.*?:.*?\]\s*)* (?P<port_list>.*?) (?= \binput\b | \boutput\b | \binout\b | ; | \) ) ''', re.VERBOSE | re.MULTILINE | re.DOTALL ) pList = port_definition.findall(inText) t = [] for ls in pList: if len(ls) >= 2: t = t + portDic(ls[-2:]) return t def portDic(port): """delet as : input a =c &d; return list as : (port, [range]) """ pRe = re.compile(r'(.*?)\s*=.*', re.DOTALL) pRange = port[0] pList = port[1].split(',') pList = [i.strip() for i in pList if i.strip() != ''] pList = [(pRe.sub(r'\1', p), pRange.strip()) for p in pList] return pList def formatPort(AllPortList, isPortRange=1): PortList = AllPortList str = '' if PortList != []: l1 = max([len(i[0]) for i in PortList])+2 l3 = max(18, l1) strList = [] str = ',\n'.join([' ' * 4 + '.' + i[0].ljust(l3) + '(' + (i[0]) + ')' for i in AllPortList]) strList = strList + [str] str = ',\n\n'.join(strList) return str def formatDeclare(PortList, portArr, initial=""): str = '' if PortList != []: str = '\n'.join([portArr.ljust(4) + ' '+(i[1]+min(len(i[1]), 1)*' ' + i[0]) + ';' for i in PortList]) return str def formatPara(ParaList): paraDec = '' paraDef = '' if ParaList != []: s = '\n'.join(ParaList) pat = r'([a-zA-Z_][a-zA-Z_0-9]*)\s*=\s*([\w\W]*?)\s*[;,)]' p = re.findall(pat, s) l1 = max([len(i[0]) for i in p]) l2 = max([len(i[1]) for i in p]) paraDec = '\n'.join(['parameter %s = %s;' % (i[0].ljust(l1 + 1), i[1].ljust(l2)) for i in p]) paraDef = '#(\n' + ',\n'.join([' .' + i[0].ljust(l1 + 1) + '( ' + i[1].ljust(l2)+' )' for i in p]) + ')\n' return paraDec, paraDef def portT(inText, ioPadAttr): x = {} count_list = [] order_list = [] for i in ioPadAttr: p = port_index_list(inText, i) for j in p: count_list.append(j) x[j] = i count_list = quick_sort(count_list, 0, len(count_list)-1) for c in count_list: order_list.append(x.get(c)) return order_list def quick_sort(myList, start, end): if start < end: i, j = start, end base = myList[i] while i < j: while (i < j) and (myList[j] >= base): j = j - 1 myList[i] = myList[j] while (i < j) and (myList[i] <= base): i = i + 1 myList[j] = myList[i] myList[i] = base quick_sort(myList, start, i - 1) quick_sort(myList, j + 1, end) return myList def formatPort_order(padAttr, orderList): for p in padAttr: q = Queue() for i in padAttr.get(p): q.put(i) padAttr[p] = q AllPortList = [] for o in orderList: AllPortList.append(padAttr.get(o).get()) return AllPortList def port_index_list(intext, text): l = [] t = intext index = t.find(text) while index > -1: t = t.replace(text, random_str(len(text)), 1) l.append(index) index = t.find(text) return l def random_str(size): s = '' for i in range(size): s += str(random.randint(0, 9)) return s def getPortMap(AllPortList, ioPadAttr): if len(AllPortList) != len(ioPadAttr): return p_map = {} for i in range(len(AllPortList)): p_map[ioPadAttr[i]] = AllPortList[i] return p_map def writeTestBench(input_file): """ write testbench to file """ with open(input_file, 'rb') as f: f_info = chardet.detect(f.read()) f_encoding = f_info['encoding'] with open(input_file, encoding=f_encoding) as inFile: inText = inFile.read() # removed comment,task,function inText = delComment(inText) inText = delBlock(inText) # moduel ... endmodule # moPos_begin = re.search(r'(\b|^)module\b', inText).end() moPos_end = re.search(r'\bendmodule\b', inText).start() inText = inText[moPos_begin:moPos_end] name = findName(inText) paraList = paraDeclare(inText, 'parameter') paraDec, paraDef = formatPara(paraList) ioPadAttr = ['input', 'output', 'inout'] orlder = portT(inText, ioPadAttr) input = portDeclare(inText, ioPadAttr[0]) output = portDeclare(inText, ioPadAttr[1]) inout = portDeclare(inText, ioPadAttr[2]) portList = formatPort(formatPort_order( getPortMap([input, output, inout], ioPadAttr), orlder)) input = formatDeclare(input, 'reg') output = formatDeclare(output, 'wire') inout = formatDeclare(inout, 'wire') # write Instance # module_parameter_port_list if(paraDec != ''): print("// %s Parameters\n%s\n" % (name, paraDec)) # list_of_port_declarations #print("// %s Inputs\n%s\n" % (name, input)) #print("// %s Outputs\n%s\n" % (name, output)) #if(inout != ''): # print("// %s Bidirs\n%s\n" % (name, inout)) print("\n") # UUT print("%s %s inst_%s (\n%s\n);" % (name, paraDef, name, portList)) if __name__ == '__main__': writeTestBench(sys.argv[1]) （5）享受一下吧。比如我们有如下代码：crtl+p，输入instance，按回车即可。 复制粘贴大发好。以上。转载于:https://www.cnblogs.com/kingstacker/p/9944259.html

uvmgen的使用及其产生的UVM环境介绍 前言UVM是IC验证的一种方法学，利用UVM搭建的验证环境基本框架都类似，因此，可以通过脚本来生成UVM的验证环境基本框架。本文主要介绍synopsys公司，在vcs工具中自带的一个脚本uvmgen，通过这个脚本，可以自动产生一整套UVM的验证环境，或者也可以只生成其中的一个UVM组件。一、uvmgen的使用首先利用uvmgen这个脚本，产生一个完整的UVM环境；然后运行这个环境，解决一些系统、工具、UVM环境之间的一些兼容性问题。1.1 uvmgen产生一个完整UVM环境这里展示一下，如何通过uvmgen这个脚本，产生一个完整的UVM环境。 hefei@ubuntu:~$ which uvmgen /opt/synopsys/vcs_vO-2018.09-SP2/bin/uvmgen hefei@ubuntu:~$ uvmgen ------------------------------------------------------------ WELCOME TO UVM TEMPLATE GENERATOR ------------------------------------------------------------ UVM templates compatible to UVM 1.1/1.2 used. Using template from /opt/synopsys/vcs_vO-2018.09-SP2/etc/uvm_template/shared/lib/templates/uvm 1) Enter 1 to Create Complete Environment 2) Enter 2 to Generate Individual Template Select [1-2]: 1 Do you want to create your own methods [Instead of UVM shorthand macros] ? Select [ y/Y/n/N ][Default: n]: n Would you be associating UVM REG models in your environment class? enter (y/n) [Default: n]:y Enter Name of RAL Adapter:ral_ad1 Enter the environment name: top_env Do you want to create Agents? Select(y/Y/n/N) [Default: n]:y Enter Master agent data Enter name of master agent: mst Enter name of sequencer: sqr1 Enter name of driver: drv1 Enter name of monitor: mon1 Enter name of interface: intf1 Enter name of the transaction: tr1 Is this transaction class extended from a BU class? enter (y/n): n Enter Slave agent data Enter name of slave agent: slv Enter name of sequencer: sqr2 Enter name of driver: drv2 Enter name of monitor: mon2 Enter name of interface: intf2 Do you want to use same transaction class for master and slave agents ? enter (y/n):y Choose one of the following ral bfm: 1) RAL sequence adapter, single domain 2) RAL sequence adapter, multiplexed domains select [1-2]:2 Enter Name of second RAL Adapter:ral_ad2 Enter Driver information for the slave agent slv :: Choose one of following driver available 1) Driver, PUSH DRIVER (uvm_push_driver) 2) Driver, PULL DRIVER (uvm_driver) Select [1- 2] [Default: 2]: Enter Driver information for the master agent mst :: Choose one of following driver available 1) Driver, PUSH DRIVER (uvm_push_driver) 2) Driver, PULL DRIVER (uvm_driver) Select [1- 2] [Default: 2]: Would you like to implement scoreboard? Select(y/Y/n/N) [Default: y]:y Enter Name of Scoreboard Class:scb The testcase generated is top_env_test ------------------------------------------------------------ Template generation completed. ------------------------------------------------------------ Usage notes : 1) Find the generated files in "proj/top_env" directory. 2) Makefile has been placed in run "proj/top_env/run" directory. 3) Edit files and look for comments marked "ToDo:" and fill in the application-specific behavior for your function. ------------------------------------------------------------ 执行完成上面的脚本后，在执行的目录下，会产生一个proj的文件夹，该文件夹的层次结构如下所示： hefei@ubuntu:~/proj$ tree . ├── README ├── top_env │ ├── doc │ ├── env │ │ ├── mst.sv │ │ ├── slv.sv │ │ ├── top_env_ral_env.sv │ │ └── top_env.ralf │ ├── examples │ ├── hdl │ │ └── top_env_top.sv │ ├── include │ │ ├── mstr_slv_intfs.incl │ │ ├── mstr_slv_src.incl │ │ └── top_env.sv │ ├── run │ │ └── Makefile │ ├── src │ │ ├── mon_2cov.sv │ │ ├── mst_drv1.sv │ │ ├── mst_intf1.sv │ │ ├── mst_mon1.sv │ │ ├── mst_sequence_library.sv │ │ ├── mst_sqr1.sv │ │ ├── mst_tr1.sv │ │ ├── ral_multiplexed.sv │ │ ├── scb.sv │ │ ├── slv_drv2.sv │ │ ├── slv_intf2.sv │ │ ├── slv_mon2.sv │ │ ├── slv_sqr2.sv │ │ ├── slv_tr1.sv │ │ ├── top_env_cfg.sv │ │ └── top_env_cov.sv │ └── tests │ ├── top_env_tb_mod.sv │ └── top_env_test.sv └── uvmgen_options_log.txt 1.2 解决运行报错的问题直接进入到proj/top_env/run这个文件夹，执行make后，会报如下错误，这是因为我们的系统是64位的，而执行ralgen和vcs的时候都没有加上-full64这个选项。 hefei@ubuntu:~/proj/top_env/run$ make rm -rf simv* csrc rm -rf vc_hdrs.h .vcsmx_rebuild *.log rm -rf work/* *.svshell vcs_version cd ../env; ralgen -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd - Error: Bad VMM installation. Executable 'ralgen.binary' not visible. /home/hefei/proj/top_env/run vcs -sverilog -l vcs.log -debug_pp +incdir+/opt/uvm-1.2/src /opt/uvm-1.2/src/uvm_pkg.sv /opt/uvm-1.2/src/dpi/uvm_dpi.cc -CFLAGS -DVCS +incdir+../include+../src+../env+../tests+../hdl \ ../tests/top_env_tb_mod.sv ../hdl/top_env_top.sv Error-[VCS_COM_UNE] Cannot find VCS compiler VCS compiler not found. Environment variable VCS_HOME (/opt/synopsys/vcs_vO-2018.09-SP2/linux) is selecting a directory in which there isn't a compiler '/opt/synopsys/vcs_vO-2018.09-SP2/linux/bin/vcs1' for a machine of this type 'linux'. Please check whether 'VCS_HOME' is incorrect; if not, see below. Perhaps vcs hasn't been installed for machine of type "linux". Or the installation has been damaged. To verify whether vcsO-2018.09 supports machine of type "Linux 5.4.0-77-generic", please look at ReleaseNotes for more details . We determine the machine type from uname; maybe uname is incorrect. You can fix installation problems by reinstalling from CDROM or downloading it from the Synopsys ftp server. For assistance, please contact vcs technical support at vcs_support@synopsys.com or call 1-800-VERILOG Makefile:61: recipe for target 'comp' failed make: *** [comp] Error 1 打开Makefile文件，在41行COMP_OPTS，以及61行ralgen后面，分别加入-full64选项，如下代码所示。 COMP_OPTS = -full64 -sverilog -l vcs.log $(UVM) $(INCL) $(DEFINES) cd ../env; ralgen -full64 -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd - 重新make后，遇到的libvcsnew.so: undefined reference to问题，可以参考如下链接进行解决。libvcsnew.so: undefined reference to加入-LDFLAGS -Wl,–no-as-needed选项后，代码如下： COMP_OPTS = -full64 -sverilog -LDFLAGS -Wl,--no-as-needed -l vcs.log $(UVM) $(INCL) $(DEFINES) 一键获取完整项目代码再重新make后，得到的仿真log如下所示 ./simv -l simv.log \ +ntb_random_seed=1 +UVM_TESTNAME=top_env_test Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Jun 24 19:47 2021 UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] ---------------------------------------------------------------- UVM-1.2 (C) 2007-2014 Mentor Graphics Corporation (C) 2007-2014 Cadence Design Systems, Inc. (C) 2006-2014 Synopsys, Inc. (C) 2011-2013 Cypress Semiconductor Corp. (C) 2013-2014 NVIDIA Corporation ---------------------------------------------------------------- *********** IMPORTANT RELEASE NOTES ************ You are using a version of the UVM library that has been compiled with `UVM_NO_DEPRECATED undefined. See http://www.eda.org/svdb/view.php?id=3313 for more details. You are using a version of the UVM library that has been compiled with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined. See http://www.eda.org/svdb/view.php?id=3770 for more details. (Specify +UVM_NO_RELNOTES to turn off this notice) UVM_INFO @ 0: reporter [RNTST] Running test top_env_test... UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161 top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_block_top_env::cg_addr' Covergroup Instance: me.obj.cg_addr Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14 top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits' Covergroup Instance: me.obj.cg_bits Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology: -------------------------------------------------------------------------- Name Type Size Value -------------------------------------------------------------------------- uvm_test_top top_env_test - @423 env top_env_ral_env - @436 cov top_env_cov - @467 Coverage Analysis uvm_analysis_imp - @476 master_agent mst - @449 mast_drv drv1 - @688 rsp_port uvm_analysis_port - @707 seq_item_port uvm_seq_item_pull_port - @697 mast_mon mon1 - @532 mon_analysis_port uvm_analysis_port - @541 mast_sqr sqr1 - @551 rsp_export uvm_analysis_export - @560 seq_item_export uvm_seq_item_pull_imp - @678 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 mon2cov mon1_2cov_connect - @486 sb scb - @495 after_export uvm_analysis_export - @736 before_export uvm_analysis_export - @726 comparator uvm_in_order_class_comparator #(T) - @746 after uvm_tlm_analysis_fifo #(T) - @844 analysis_export uvm_analysis_imp - @893 get_ap uvm_analysis_port - @883 get_peek_export uvm_get_peek_imp - @863 put_ap uvm_analysis_port - @873 put_export uvm_put_imp - @853 after_export uvm_analysis_export - @765 before uvm_tlm_analysis_fifo #(T) - @785 analysis_export uvm_analysis_imp - @834 get_ap uvm_analysis_port - @824 get_peek_export uvm_get_peek_imp - @804 put_ap uvm_analysis_port - @814 put_export uvm_put_imp - @794 before_export uvm_analysis_export - @755 pair_ap uvm_analysis_port - @775 slave_agent slv - @458 drv drv2 - @923 rsp_port uvm_analysis_port - @942 seq_item_port uvm_seq_item_pull_port - @932 mon mon2 - @904 mon_analysis_port uvm_analysis_port - @913 slv_seqr sqr2 - @952 rsp_export uvm_analysis_export - @961 seq_item_export uvm_seq_item_pull_imp - @1079 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 -------------------------------------------------------------------------- UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] #### Factory Configuration (*) No instance or type overrides are registered with this factory All types registered with the factory: 80 total Type Name --------- REGTR base_sequence drv1 drv2 mon1 mon1_2cov_connect mon2 mst ral_ad2 ral_block_top_env ral_mem_top_env_top_env_RAM ral_reg_top_env_CHIP_ID reg_seq scb sequence_0 sequence_1 slv sqr1 sqr1_sequence_library sqr2 top_env_cfg top_env_cov top_env_ral_env top_env_test tr1 (*) Types with no associated type name will be printed as <unknown> #### UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_mon1.sv(133) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR] Starting transaction... UVM_INFO ../src/mst_mon1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR] User need to add monitoring logic $finish called from file "../src/mst_mon1.sv", line 138. $finish at simulation time 0 V C S S i m u l a t i o n R e p o r t Time: 0 CPU Time: 1.110 seconds; Data structure size: 0.4Mb 到此为止，通过uvmgen脚本生成的整个UVM环境已经能够正常运行。uvmgen还可以生成单个的UVM组件，以及快速产生一个完整的UVM环境的方法，更多关于uvmgen脚本的使用方法，可以参考如下文档。uvmgen_userguide.pdf二、uvmgen产生的UVM环境拿到这个环境，首先，了解一下这个环境的框架，其次想着打印一下接口的波形，看看时钟复位是否正确；最后，要解决仿真异常结束的问题，上面仿真执行的log显示，$finish called from file “…/src/mst_mon1.sv”, line 138.，这不是UVM仿真的正常结束的log。2.1 环境框架uvmgen产生的uvm环境的框架如下图所示：2.2 添加打印波形打开顶层文件proj/top_env/hdl/top_env_top.sv，加入如下代码实现打印波形。 initial $fsdbDumpvars(); 重新make后，遇到的Undefined System Task call to '$fsdbDumpfile '问题，解决方法参考如下：Undefined System Task call to ‘$fsdbDumpfile’之后打开fsdb波形，调出时钟和复位信号后，显示正常，并没有像下文所述存在bug的情况，虽然VCS版本不同，但对比了时钟复位产生的源代码都是一致的。2011版VCS自带的工具UVMGEN的一个BUG，很难想像有这种级别的BUG～～2.3 解决仿真异常结束的问题仿真执行的log显示，$finish called from file “…/src/mst_mon1.sv”, line 138.，这不是UVM仿真的正常结束的log，对应的sequence激励也没有下发。打开proj/top_env/src/mst_mon1.sv，定位到138行，将138行的finish屏蔽，在130行加入一个wait(0)，避免mon1中的forever循环一直刷log(这里只是临时处理一下，后期填入代码的时候需要将其去掉)，如下图所示。同样的方式处理proj/top_env/src/slv_mon2.sv文件。再重新make，通过下面的log，可以看到仿真已经正常结束，sequence中的激励，也已经下发到了drver中。 ./simv -l simv.log \ +ntb_random_seed=1 +UVM_TESTNAME=top_env_test Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Jun 25 00:02 2021 UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] ---------------------------------------------------------------- UVM-1.2 (C) 2007-2014 Mentor Graphics Corporation (C) 2007-2014 Cadence Design Systems, Inc. (C) 2006-2014 Synopsys, Inc. (C) 2011-2013 Cypress Semiconductor Corp. (C) 2013-2014 NVIDIA Corporation ---------------------------------------------------------------- *********** IMPORTANT RELEASE NOTES ************ You are using a version of the UVM library that has been compiled with `UVM_NO_DEPRECATED undefined. See http://www.eda.org/svdb/view.php?id=3313 for more details. You are using a version of the UVM library that has been compiled with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined. See http://www.eda.org/svdb/view.php?id=3770 for more details. (Specify +UVM_NO_RELNOTES to turn off this notice) UVM_INFO @ 0: reporter [RNTST] Running test top_env_test... *Verdi* Loading libsscore_vcs201809.so FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019 (C) 1996 - 2019 by Synopsys, Inc. *Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. *Verdi* : Create FSDB file 'novas.fsdb' *Verdi* : Begin traversing the scopes, layer (0). *Verdi* : End of traversing. UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161 top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_block_top_env::cg_addr' Covergroup Instance: me.obj.cg_addr Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14 top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits' Covergroup Instance: me.obj.cg_bits Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology: -------------------------------------------------------------------------- Name Type Size Value -------------------------------------------------------------------------- uvm_test_top top_env_test - @423 env top_env_ral_env - @436 cov top_env_cov - @467 Coverage Analysis uvm_analysis_imp - @476 master_agent mst - @449 mast_drv drv1 - @688 rsp_port uvm_analysis_port - @707 seq_item_port uvm_seq_item_pull_port - @697 mast_mon mon1 - @532 mon_analysis_port uvm_analysis_port - @541 mast_sqr sqr1 - @551 rsp_export uvm_analysis_export - @560 seq_item_export uvm_seq_item_pull_imp - @678 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 mon2cov mon1_2cov_connect - @486 sb scb - @495 after_export uvm_analysis_export - @736 before_export uvm_analysis_export - @726 comparator uvm_in_order_class_comparator #(T) - @746 after uvm_tlm_analysis_fifo #(T) - @844 analysis_export uvm_analysis_imp - @893 get_ap uvm_analysis_port - @883 get_peek_export uvm_get_peek_imp - @863 put_ap uvm_analysis_port - @873 put_export uvm_put_imp - @853 after_export uvm_analysis_export - @765 before uvm_tlm_analysis_fifo #(T) - @785 analysis_export uvm_analysis_imp - @834 get_ap uvm_analysis_port - @824 get_peek_export uvm_get_peek_imp - @804 put_ap uvm_analysis_port - @814 put_export uvm_put_imp - @794 before_export uvm_analysis_export - @755 pair_ap uvm_analysis_port - @775 slave_agent slv - @458 drv drv2 - @923 rsp_port uvm_analysis_port - @942 seq_item_port uvm_seq_item_pull_port - @932 mon mon2 - @904 mon_analysis_port uvm_analysis_port - @913 slv_seqr sqr2 - @952 rsp_export uvm_analysis_export - @961 seq_item_export uvm_seq_item_pull_imp - @1079 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 -------------------------------------------------------------------------- UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] #### Factory Configuration (*) No instance or type overrides are registered with this factory All types registered with the factory: 80 total Type Name --------- REGTR base_sequence drv1 drv2 mon1 mon1_2cov_connect mon2 mst ral_ad2 ral_block_top_env ral_mem_top_env_top_env_RAM ral_reg_top_env_CHIP_ID reg_seq scb sequence_0 sequence_1 slv sqr1 sqr1_sequence_library sqr2 top_env_cfg top_env_cov top_env_ral_env top_env_test tr1 (*) Types with no associated type name will be printed as <unknown> #### UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/slv_drv2.sv(121) @ 0: uvm_test_top.env.slave_agent.drv [top_env_DRIVER] Starting transaction... UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(659) @ 0: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/START] Starting sequence library sqr1_sequence_library in main phase: 10 iterations in mode UVM_SEQ_LIB_RAND UVM_INFO ../src/mst_drv1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(736) @ 3000: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/END] Ending sequence library in phase main UVM_INFO ../src/scb.sv(50) @ 3000: uvm_test_top.env.sb [SBRPT] Matches = 0, Mismatches = 0 UVM_INFO /opt/uvm-1.2/src/base/uvm_report_server.svh(847) @ 3000: reporter [UVM/REPORT/SERVER] --- UVM Report Summary --- ** Report counts by severity UVM_INFO : 212 UVM_WARNING : 0 UVM_ERROR : 0 UVM_FATAL : 0 ** Report counts by id [RNTST] 1 [SBRPT] 1 [SEQLIB/END] 1 [SEQLIB/START] 1 [UVM/CONFIGDB/SPELLCHK] 3 [UVM/FACTORY/PRINT] 1 [UVM/RELNOTES] 1 [UVMTOP] 1 [top_env_DRIVER] 202 $finish called from file "/opt/uvm-1.2/src/base/uvm_root.svh", line 517. $finish at simulation time 3000 V C S S i m u l a t i o n R e p o r t Time: 3000 CPU Time: 1.350 seconds; Data structure size: 0.5Mb到此为止，通过uvmgen脚本产生的UVM环境框架，已经正常编译仿真，下面需要做的就是，根据我们自己的项目，往对应的组件里边填入具体的实现，需要修改的组件包括driver、monitor、sequence、regmodel、coverage等。2.3 发现环境中存在的一些问题问题一：monitor组件获取不到interface。不管是mst还是slv中的monitor组件，一方面是get的时候用的标签，和前面set的不一致，导致get不到interface；另一方面，没有去判断get到的句柄是否为空。修改mst_mon1的代码如下所示：主要修改的地方有两点：1、85行get函数的第三个参数标签由mon_if改为mst_if；2、添加91和92行，用于检测mst_mon1中是否get到interface，如果get不到，立马结束仿真。slv_mon2的代码修改方式和mst_mon1类似，标签改成slv_if。至于与这些get任务相对应的set任务在哪里，可以参考如下帖子：如何定位uvm_config_db get任务的来源总的来说，agt、drv、mon中的get任务都来自proj/top_env/tests/top_env_tb_mod.sv中，19和20行的两个set任务，当set任务前面两个参数为空的情况下，应该是全域去set，因此可以在uvm所有地方都能get到这个interface。最后，需要将proj/top_env/env/mst.sv和proj/top_env/env/slv.sv的38和39行注释掉，如下图所示，这是因为，这个set函数将自己的interface传递给自己没有任何意义，而且在仿真的时候，通过 +UVM_CONFIG_DB_TRACE加入这个宏之后，还会debug报错。总结本文首先记录了利用uvmgen这个脚本，去产生一个完整的UVM验证环境框架的方法；然后解决了一些系统、工具、UVM环境之间的兼容性问题；最后发现并解决了，脚本生成的UVM验证环境框架中，在通过config_db传递interface时候的问题。————————————————版权声明：本文为CSDN博主「hh199203」的原创文章，遵循CC 4.0 BY-SA版权协议，转载请附上原文出处链接及本声明。原文链接：https://blog.csdn.net/hh199203/article/details/118210541