标签 UVM 下的文章 - 欢迎来到半导体与芯片的世界

首页游戏影视直播广播听书音乐图片

更多

看书微视主播统计友链留言关于论坛邮件

推荐

我的硬盘我的搜索我的记录我的文件我的图书我的笔记我的书签我的微博

1 在IC617中进行xa+vcs数模混仿 81 阅读 2 科普：Memory Compiler生成的Register file和SRAM有何区别？ 73 阅读 3 virtuoso和empyrean alps模拟仿真和混仿教程 73 阅读 4 后仿中$setup,$hold与$setuphold 44 阅读 5 文档内容搜索哪家强？ 15款文件搜索软件横向评测 35 阅读

默认分类芯片市场数字电路芯片后端模拟电路芯片验证原型与样片验证算法与架构 DFX与量产封装 PC&Server OS设置移动OS设置软件方案新浪备份有道备份

登录

标签搜索

python
Docker
vscode
linux
systemverilog
vcs
STM32
PyQT
EDA
FPGA
gvim
cadence
Alist
xilinx
UVM
uos
macos
package
MCU
risc-v

bennyhe

累计撰写 378 篇文章
累计收到 31 条评论

首页
栏目
页面
- 游戏
- 影视
- 直播
- 广播
- 听书
- 音乐
- 图片
- 看书
- 微视
- 主播
- 统计
- 友链
- 留言
- 关于
- 论坛
- 邮件
推荐

搜索到 3 篇与的结果

2026-01-08
UVM入门验证技术的发展历程这是我们作为一名合格验证人员装B必备，如下图所示:2000年：Verisity Design（现在的Cadence公司）引进了Verification Advisor（vAdvisor）采用了e语言，包含了激励的产生，自动比对的策略，覆盖率模型。e语言是面向对象语言，这是业界开始使用面向对象语言进行测试平台的建立。2002年：Verisity公司公布了第一个验证库——e可重用方法学（eRM）。2003年：Synopsys公司公布了可重用验证方法学库（RVM），这个方法学采用了Synopsys公司的vera语言。2006年：Mentor公司公布了高级验证方法学（AVM）。这个方法学主要是采用了OSCI SystemC的事务抽象层方法学（TLM）标准，它是用SystemVerilog和SystemC两种语言实现的。2006年：Synopsys公司推出了验证方法学手册（VMM），这个是RVM从vera语言过度到SystemVerilog的方法学。2007年：Cadence公司推出了通用可重用验证方法学（URM），主要是从eRM从E语言过度到SystemVerilog的方法学，同时加入了TLM接口，工厂模式替换，配置机制，策励类等。2008年：Cadence公司和Mentor公司共同推出了OVM2010年：Synopsys公司推出了VMM1.2，基本上沿用了OVM的TLM通信机制，并采用了TLM2.0（OSCI最新的标准），采用OVM提出的implicit phase，并且将验证流程继续细化，工厂模式替换机制，建立类层次（建立parent关系）。并且在此基础上，提出了vmm_timeline的概念，方便各个phase之间实现跳转，增加phase或删除phase。增加了rtl_config等概念。Synopsys公司也随即宣布最新版本的VCS 同时支持UVM。2010年：ACCELLERA采用了OVM作为基础，推出了UVM验证方法学。同时引入了VMM的callbacks一些概念。作为业界方法学统一的一个雏形。2011年2月：Accellera通过了通用验证方法学1.0版，并得到三大厂商（Cadence，Synopsys和Mentor Graphics现英飞凌）的共同支持。此后Accellera陆续推出了UVM1.1, UVM1.1a,UVM1.1b,UVM1.1c,UVM1.1d这几个版本。2014年6月，Accellera有推出了通用验证方法学1.2版。目前UVM最新版是UVM-1800.2-2017-1.0（版本号命名都变了哈）UVM(Universal Verification Methodology) UVM几乎完全继承了OVM，同时又采纳了Synopsys在VMM中的寄存器解决方案RAL。UVM继承了OVM和VMM的优点，克服了各自的缺点，代表了验证方法学的发展方向。UVM介绍UVM是一个以SystemVerilog为主体的验证平台开发框架，验证工程师利用其可重用组件可以构建具有标准化层次结构和接口的功能验证环境。UVM是一个库，在这个库中，几乎所有的东西都是使用类(class)来实现的。类是面向对象编程语言中最伟大的发明之一，是面向对象的精髓所在。使用UVM的第一条原则是：验证平台中所有的组件都应该派生自UVM中的类。当要实现一个功能时，首先应该想到的就是从UVM的某个类派生出一个新的类，类中可以有成员变量，也可以有函数和任务，通过成员变量、函数或任务实现所期望的功能。对于验证方法学来说，分层的测试平台是一个关键的概念。虽然分层似乎会使测试平台变得更复杂，但它能够把代码分而治之，有助于减轻工作负担，而且重复利用效率提升。基于UVM的验证平台可以类似分为五个层次：信号层、命令层、功能层、场景层和测试层：如何学习UVMUVM1.2版本包含121个文件，311个类。从经验来说，我们搭建一个普通的UVM验证环境，大约需要编写10个文件，20个类左右。这里分享一下对初学者的个人建议：第一阶段-基础：学习UVM之前, 熟悉SV是必须的，关于SV的系统学习首推“绿皮书”。工作中“asic-world”这个网站可以作为我们的查询手册。第二阶段-学习：有了SV的基础和OOP的思想，我们就可以开始学习UVM了（很多人入门是看《UVM实战》-张强著）。这时我们需要了解UVM构架，各种component, phase管理机制等。最好配合实例代码一边看书一边敲代码做练习。第三阶段-应用：当然我们有的朋友会说："我现在的公司还没有用UVM来搭环境呀，怎么应用啊？" 但是，没有条件我们可以创造条件呀！网上这么多开源的IP，找一个自己感兴趣的，把自己当成验证主管，自己玩儿呗。或者把已经做过的项目再用UVM搭一遍（别说你没时间哦~第四阶段-研究：这个时候你已经是熟手，并能够独立搭建复用性很强的UVM环境了。这时可以去看看UVM源码，帮助同事解决实际工作中的各种问题。研究一下UVM代码自动生成，UVMF是什么等等
- 2026年01月08日
- 2 阅读
- 0 评论
- 0 点赞
2025-12-31
uvmgen的使用及其产生的UVM环境介绍前言UVM是IC验证的一种方法学，利用UVM搭建的验证环境基本框架都类似，因此，可以通过脚本来生成UVM的验证环境基本框架。本文主要介绍synopsys公司，在vcs工具中自带的一个脚本uvmgen，通过这个脚本，可以自动产生一整套UVM的验证环境，或者也可以只生成其中的一个UVM组件。一、uvmgen的使用首先利用uvmgen这个脚本，产生一个完整的UVM环境；然后运行这个环境，解决一些系统、工具、UVM环境之间的一些兼容性问题。1.1 uvmgen产生一个完整UVM环境这里展示一下，如何通过uvmgen这个脚本，产生一个完整的UVM环境。 hefei@ubuntu:~$ which uvmgen /opt/synopsys/vcs_vO-2018.09-SP2/bin/uvmgen hefei@ubuntu:~$ uvmgen ------------------------------------------------------------ WELCOME TO UVM TEMPLATE GENERATOR ------------------------------------------------------------ UVM templates compatible to UVM 1.1/1.2 used. Using template from /opt/synopsys/vcs_vO-2018.09-SP2/etc/uvm_template/shared/lib/templates/uvm 1) Enter 1 to Create Complete Environment 2) Enter 2 to Generate Individual Template Select [1-2]: 1 Do you want to create your own methods [Instead of UVM shorthand macros] ? Select [ y/Y/n/N ][Default: n]: n Would you be associating UVM REG models in your environment class? enter (y/n) [Default: n]:y Enter Name of RAL Adapter:ral_ad1 Enter the environment name: top_env Do you want to create Agents? Select(y/Y/n/N) [Default: n]:y Enter Master agent data Enter name of master agent: mst Enter name of sequencer: sqr1 Enter name of driver: drv1 Enter name of monitor: mon1 Enter name of interface: intf1 Enter name of the transaction: tr1 Is this transaction class extended from a BU class? enter (y/n): n Enter Slave agent data Enter name of slave agent: slv Enter name of sequencer: sqr2 Enter name of driver: drv2 Enter name of monitor: mon2 Enter name of interface: intf2 Do you want to use same transaction class for master and slave agents ? enter (y/n):y Choose one of the following ral bfm: 1) RAL sequence adapter, single domain 2) RAL sequence adapter, multiplexed domains select [1-2]:2 Enter Name of second RAL Adapter:ral_ad2 Enter Driver information for the slave agent slv :: Choose one of following driver available 1) Driver, PUSH DRIVER (uvm_push_driver) 2) Driver, PULL DRIVER (uvm_driver) Select [1- 2] [Default: 2]: Enter Driver information for the master agent mst :: Choose one of following driver available 1) Driver, PUSH DRIVER (uvm_push_driver) 2) Driver, PULL DRIVER (uvm_driver) Select [1- 2] [Default: 2]: Would you like to implement scoreboard? Select(y/Y/n/N) [Default: y]:y Enter Name of Scoreboard Class:scb The testcase generated is top_env_test ------------------------------------------------------------ Template generation completed. ------------------------------------------------------------ Usage notes : 1) Find the generated files in "proj/top_env" directory. 2) Makefile has been placed in run "proj/top_env/run" directory. 3) Edit files and look for comments marked "ToDo:" and fill in the application-specific behavior for your function. ------------------------------------------------------------ 执行完成上面的脚本后，在执行的目录下，会产生一个proj的文件夹，该文件夹的层次结构如下所示： hefei@ubuntu:~/proj$ tree . ├── README ├── top_env │ ├── doc │ ├── env │ │ ├── mst.sv │ │ ├── slv.sv │ │ ├── top_env_ral_env.sv │ │ └── top_env.ralf │ ├── examples │ ├── hdl │ │ └── top_env_top.sv │ ├── include │ │ ├── mstr_slv_intfs.incl │ │ ├── mstr_slv_src.incl │ │ └── top_env.sv │ ├── run │ │ └── Makefile │ ├── src │ │ ├── mon_2cov.sv │ │ ├── mst_drv1.sv │ │ ├── mst_intf1.sv │ │ ├── mst_mon1.sv │ │ ├── mst_sequence_library.sv │ │ ├── mst_sqr1.sv │ │ ├── mst_tr1.sv │ │ ├── ral_multiplexed.sv │ │ ├── scb.sv │ │ ├── slv_drv2.sv │ │ ├── slv_intf2.sv │ │ ├── slv_mon2.sv │ │ ├── slv_sqr2.sv │ │ ├── slv_tr1.sv │ │ ├── top_env_cfg.sv │ │ └── top_env_cov.sv │ └── tests │ ├── top_env_tb_mod.sv │ └── top_env_test.sv └── uvmgen_options_log.txt 1.2 解决运行报错的问题直接进入到proj/top_env/run这个文件夹，执行make后，会报如下错误，这是因为我们的系统是64位的，而执行ralgen和vcs的时候都没有加上-full64这个选项。 hefei@ubuntu:~/proj/top_env/run$ make rm -rf simv* csrc rm -rf vc_hdrs.h .vcsmx_rebuild *.log rm -rf work/* *.svshell vcs_version cd ../env; ralgen -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd - Error: Bad VMM installation. Executable 'ralgen.binary' not visible. /home/hefei/proj/top_env/run vcs -sverilog -l vcs.log -debug_pp +incdir+/opt/uvm-1.2/src /opt/uvm-1.2/src/uvm_pkg.sv /opt/uvm-1.2/src/dpi/uvm_dpi.cc -CFLAGS -DVCS +incdir+../include+../src+../env+../tests+../hdl \ ../tests/top_env_tb_mod.sv ../hdl/top_env_top.sv Error-[VCS_COM_UNE] Cannot find VCS compiler VCS compiler not found. Environment variable VCS_HOME (/opt/synopsys/vcs_vO-2018.09-SP2/linux) is selecting a directory in which there isn't a compiler '/opt/synopsys/vcs_vO-2018.09-SP2/linux/bin/vcs1' for a machine of this type 'linux'. Please check whether 'VCS_HOME' is incorrect; if not, see below. Perhaps vcs hasn't been installed for machine of type "linux". Or the installation has been damaged. To verify whether vcsO-2018.09 supports machine of type "Linux 5.4.0-77-generic", please look at ReleaseNotes for more details . We determine the machine type from uname; maybe uname is incorrect. You can fix installation problems by reinstalling from CDROM or downloading it from the Synopsys ftp server. For assistance, please contact vcs technical support at vcs_support@synopsys.com or call 1-800-VERILOG Makefile:61: recipe for target 'comp' failed make: *** [comp] Error 1 打开Makefile文件，在41行COMP_OPTS，以及61行ralgen后面，分别加入-full64选项，如下代码所示。 COMP_OPTS = -full64 -sverilog -l vcs.log $(UVM) $(INCL) $(DEFINES) cd ../env; ralgen -full64 -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd - 重新make后，遇到的libvcsnew.so: undefined reference to问题，可以参考如下链接进行解决。libvcsnew.so: undefined reference to加入-LDFLAGS -Wl,–no-as-needed选项后，代码如下： COMP_OPTS = -full64 -sverilog -LDFLAGS -Wl,--no-as-needed -l vcs.log $(UVM) $(INCL) $(DEFINES) 一键获取完整项目代码再重新make后，得到的仿真log如下所示 ./simv -l simv.log \ +ntb_random_seed=1 +UVM_TESTNAME=top_env_test Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Jun 24 19:47 2021 UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] ---------------------------------------------------------------- UVM-1.2 (C) 2007-2014 Mentor Graphics Corporation (C) 2007-2014 Cadence Design Systems, Inc. (C) 2006-2014 Synopsys, Inc. (C) 2011-2013 Cypress Semiconductor Corp. (C) 2013-2014 NVIDIA Corporation ---------------------------------------------------------------- *********** IMPORTANT RELEASE NOTES ************ You are using a version of the UVM library that has been compiled with `UVM_NO_DEPRECATED undefined. See http://www.eda.org/svdb/view.php?id=3313 for more details. You are using a version of the UVM library that has been compiled with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined. See http://www.eda.org/svdb/view.php?id=3770 for more details. (Specify +UVM_NO_RELNOTES to turn off this notice) UVM_INFO @ 0: reporter [RNTST] Running test top_env_test... UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161 top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_block_top_env::cg_addr' Covergroup Instance: me.obj.cg_addr Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14 top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits' Covergroup Instance: me.obj.cg_bits Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology: -------------------------------------------------------------------------- Name Type Size Value -------------------------------------------------------------------------- uvm_test_top top_env_test - @423 env top_env_ral_env - @436 cov top_env_cov - @467 Coverage Analysis uvm_analysis_imp - @476 master_agent mst - @449 mast_drv drv1 - @688 rsp_port uvm_analysis_port - @707 seq_item_port uvm_seq_item_pull_port - @697 mast_mon mon1 - @532 mon_analysis_port uvm_analysis_port - @541 mast_sqr sqr1 - @551 rsp_export uvm_analysis_export - @560 seq_item_export uvm_seq_item_pull_imp - @678 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 mon2cov mon1_2cov_connect - @486 sb scb - @495 after_export uvm_analysis_export - @736 before_export uvm_analysis_export - @726 comparator uvm_in_order_class_comparator #(T) - @746 after uvm_tlm_analysis_fifo #(T) - @844 analysis_export uvm_analysis_imp - @893 get_ap uvm_analysis_port - @883 get_peek_export uvm_get_peek_imp - @863 put_ap uvm_analysis_port - @873 put_export uvm_put_imp - @853 after_export uvm_analysis_export - @765 before uvm_tlm_analysis_fifo #(T) - @785 analysis_export uvm_analysis_imp - @834 get_ap uvm_analysis_port - @824 get_peek_export uvm_get_peek_imp - @804 put_ap uvm_analysis_port - @814 put_export uvm_put_imp - @794 before_export uvm_analysis_export - @755 pair_ap uvm_analysis_port - @775 slave_agent slv - @458 drv drv2 - @923 rsp_port uvm_analysis_port - @942 seq_item_port uvm_seq_item_pull_port - @932 mon mon2 - @904 mon_analysis_port uvm_analysis_port - @913 slv_seqr sqr2 - @952 rsp_export uvm_analysis_export - @961 seq_item_export uvm_seq_item_pull_imp - @1079 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 -------------------------------------------------------------------------- UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] #### Factory Configuration (*) No instance or type overrides are registered with this factory All types registered with the factory: 80 total Type Name --------- REGTR base_sequence drv1 drv2 mon1 mon1_2cov_connect mon2 mst ral_ad2 ral_block_top_env ral_mem_top_env_top_env_RAM ral_reg_top_env_CHIP_ID reg_seq scb sequence_0 sequence_1 slv sqr1 sqr1_sequence_library sqr2 top_env_cfg top_env_cov top_env_ral_env top_env_test tr1 (*) Types with no associated type name will be printed as <unknown> #### UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_mon1.sv(133) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR] Starting transaction... UVM_INFO ../src/mst_mon1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR] User need to add monitoring logic $finish called from file "../src/mst_mon1.sv", line 138. $finish at simulation time 0 V C S S i m u l a t i o n R e p o r t Time: 0 CPU Time: 1.110 seconds; Data structure size: 0.4Mb 到此为止，通过uvmgen脚本生成的整个UVM环境已经能够正常运行。uvmgen还可以生成单个的UVM组件，以及快速产生一个完整的UVM环境的方法，更多关于uvmgen脚本的使用方法，可以参考如下文档。uvmgen_userguide.pdf二、uvmgen产生的UVM环境拿到这个环境，首先，了解一下这个环境的框架，其次想着打印一下接口的波形，看看时钟复位是否正确；最后，要解决仿真异常结束的问题，上面仿真执行的log显示，$finish called from file “…/src/mst_mon1.sv”, line 138.，这不是UVM仿真的正常结束的log。2.1 环境框架uvmgen产生的uvm环境的框架如下图所示：2.2 添加打印波形打开顶层文件proj/top_env/hdl/top_env_top.sv，加入如下代码实现打印波形。 initial $fsdbDumpvars(); 重新make后，遇到的Undefined System Task call to '$fsdbDumpfile '问题，解决方法参考如下：Undefined System Task call to ‘$fsdbDumpfile’之后打开fsdb波形，调出时钟和复位信号后，显示正常，并没有像下文所述存在bug的情况，虽然VCS版本不同，但对比了时钟复位产生的源代码都是一致的。2011版VCS自带的工具UVMGEN的一个BUG，很难想像有这种级别的BUG～～2.3 解决仿真异常结束的问题仿真执行的log显示，$finish called from file “…/src/mst_mon1.sv”, line 138.，这不是UVM仿真的正常结束的log，对应的sequence激励也没有下发。打开proj/top_env/src/mst_mon1.sv，定位到138行，将138行的finish屏蔽，在130行加入一个wait(0)，避免mon1中的forever循环一直刷log(这里只是临时处理一下，后期填入代码的时候需要将其去掉)，如下图所示。同样的方式处理proj/top_env/src/slv_mon2.sv文件。再重新make，通过下面的log，可以看到仿真已经正常结束，sequence中的激励，也已经下发到了drver中。 ./simv -l simv.log \ +ntb_random_seed=1 +UVM_TESTNAME=top_env_test Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Jun 25 00:02 2021 UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] ---------------------------------------------------------------- UVM-1.2 (C) 2007-2014 Mentor Graphics Corporation (C) 2007-2014 Cadence Design Systems, Inc. (C) 2006-2014 Synopsys, Inc. (C) 2011-2013 Cypress Semiconductor Corp. (C) 2013-2014 NVIDIA Corporation ---------------------------------------------------------------- *********** IMPORTANT RELEASE NOTES ************ You are using a version of the UVM library that has been compiled with `UVM_NO_DEPRECATED undefined. See http://www.eda.org/svdb/view.php?id=3313 for more details. You are using a version of the UVM library that has been compiled with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined. See http://www.eda.org/svdb/view.php?id=3770 for more details. (Specify +UVM_NO_RELNOTES to turn off this notice) UVM_INFO @ 0: reporter [RNTST] Running test top_env_test... *Verdi* Loading libsscore_vcs201809.so FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019 (C) 1996 - 2019 by Synopsys, Inc. *Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. *Verdi* : Create FSDB file 'novas.fsdb' *Verdi* : Begin traversing the scopes, layer (0). *Verdi* : End of traversing. UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161 top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_block_top_env::cg_addr' Covergroup Instance: me.obj.cg_addr Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence Note-[FCICIO] Instance coverage is ON /home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14 top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits" Instance coverage is set (option.per_instance = 1) for covergroup 'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits' Covergroup Instance: me.obj.cg_bits Design hierarchy: top_env_top.test UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology: -------------------------------------------------------------------------- Name Type Size Value -------------------------------------------------------------------------- uvm_test_top top_env_test - @423 env top_env_ral_env - @436 cov top_env_cov - @467 Coverage Analysis uvm_analysis_imp - @476 master_agent mst - @449 mast_drv drv1 - @688 rsp_port uvm_analysis_port - @707 seq_item_port uvm_seq_item_pull_port - @697 mast_mon mon1 - @532 mon_analysis_port uvm_analysis_port - @541 mast_sqr sqr1 - @551 rsp_export uvm_analysis_export - @560 seq_item_export uvm_seq_item_pull_imp - @678 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 mon2cov mon1_2cov_connect - @486 sb scb - @495 after_export uvm_analysis_export - @736 before_export uvm_analysis_export - @726 comparator uvm_in_order_class_comparator #(T) - @746 after uvm_tlm_analysis_fifo #(T) - @844 analysis_export uvm_analysis_imp - @893 get_ap uvm_analysis_port - @883 get_peek_export uvm_get_peek_imp - @863 put_ap uvm_analysis_port - @873 put_export uvm_put_imp - @853 after_export uvm_analysis_export - @765 before uvm_tlm_analysis_fifo #(T) - @785 analysis_export uvm_analysis_imp - @834 get_ap uvm_analysis_port - @824 get_peek_export uvm_get_peek_imp - @804 put_ap uvm_analysis_port - @814 put_export uvm_put_imp - @794 before_export uvm_analysis_export - @755 pair_ap uvm_analysis_port - @775 slave_agent slv - @458 drv drv2 - @923 rsp_port uvm_analysis_port - @942 seq_item_port uvm_seq_item_pull_port - @932 mon mon2 - @904 mon_analysis_port uvm_analysis_port - @913 slv_seqr sqr2 - @952 rsp_export uvm_analysis_export - @961 seq_item_export uvm_seq_item_pull_imp - @1079 arbitration_queue array 0 - lock_queue array 0 - num_last_reqs integral 32 'd1 num_last_rsps integral 32 'd1 -------------------------------------------------------------------------- UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] #### Factory Configuration (*) No instance or type overrides are registered with this factory All types registered with the factory: 80 total Type Name --------- REGTR base_sequence drv1 drv2 mon1 mon1_2cov_connect mon2 mst ral_ad2 ral_block_top_env ral_mem_top_env_top_env_RAM ral_reg_top_env_CHIP_ID reg_seq scb sequence_0 sequence_1 slv sqr1 sqr1_sequence_library sqr2 top_env_cfg top_env_cov top_env_ral_env top_env_test tr1 (*) Types with no associated type name will be printed as <unknown> #### UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/slv_drv2.sv(121) @ 0: uvm_test_top.env.slave_agent.drv [top_env_DRIVER] Starting transaction... UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(659) @ 0: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/START] Starting sequence library sqr1_sequence_library in main phase: 10 iterations in mode UVM_SEQ_LIB_RAND UVM_INFO ../src/mst_drv1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction... UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction... UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(736) @ 3000: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/END] Ending sequence library in phase main UVM_INFO ../src/scb.sv(50) @ 3000: uvm_test_top.env.sb [SBRPT] Matches = 0, Mismatches = 0 UVM_INFO /opt/uvm-1.2/src/base/uvm_report_server.svh(847) @ 3000: reporter [UVM/REPORT/SERVER] --- UVM Report Summary --- ** Report counts by severity UVM_INFO : 212 UVM_WARNING : 0 UVM_ERROR : 0 UVM_FATAL : 0 ** Report counts by id [RNTST] 1 [SBRPT] 1 [SEQLIB/END] 1 [SEQLIB/START] 1 [UVM/CONFIGDB/SPELLCHK] 3 [UVM/FACTORY/PRINT] 1 [UVM/RELNOTES] 1 [UVMTOP] 1 [top_env_DRIVER] 202 $finish called from file "/opt/uvm-1.2/src/base/uvm_root.svh", line 517. $finish at simulation time 3000 V C S S i m u l a t i o n R e p o r t Time: 3000 CPU Time: 1.350 seconds; Data structure size: 0.5Mb到此为止，通过uvmgen脚本产生的UVM环境框架，已经正常编译仿真，下面需要做的就是，根据我们自己的项目，往对应的组件里边填入具体的实现，需要修改的组件包括driver、monitor、sequence、regmodel、coverage等。2.3 发现环境中存在的一些问题问题一：monitor组件获取不到interface。不管是mst还是slv中的monitor组件，一方面是get的时候用的标签，和前面set的不一致，导致get不到interface；另一方面，没有去判断get到的句柄是否为空。修改mst_mon1的代码如下所示：主要修改的地方有两点：1、85行get函数的第三个参数标签由mon_if改为mst_if；2、添加91和92行，用于检测mst_mon1中是否get到interface，如果get不到，立马结束仿真。slv_mon2的代码修改方式和mst_mon1类似，标签改成slv_if。至于与这些get任务相对应的set任务在哪里，可以参考如下帖子：如何定位uvm_config_db get任务的来源总的来说，agt、drv、mon中的get任务都来自proj/top_env/tests/top_env_tb_mod.sv中，19和20行的两个set任务，当set任务前面两个参数为空的情况下，应该是全域去set，因此可以在uvm所有地方都能get到这个interface。最后，需要将proj/top_env/env/mst.sv和proj/top_env/env/slv.sv的38和39行注释掉，如下图所示，这是因为，这个set函数将自己的interface传递给自己没有任何意义，而且在仿真的时候，通过 +UVM_CONFIG_DB_TRACE加入这个宏之后，还会debug报错。总结本文首先记录了利用uvmgen这个脚本，去产生一个完整的UVM验证环境框架的方法；然后解决了一些系统、工具、UVM环境之间的兼容性问题；最后发现并解决了，脚本生成的UVM验证环境框架中，在通过config_db传递interface时候的问题。————————————————版权声明：本文为CSDN博主「hh199203」的原创文章，遵循CC 4.0 BY-SA版权协议，转载请附上原文出处链接及本声明。原文链接：https://blog.csdn.net/hh199203/article/details/118210541
- 2025年12月31日
- 2 阅读
- 0 评论
- 0 点赞
2025-06-06
SystemVerilog和SystemC协同验证环境介绍（1）先说结论：使用有公开源代码的uvmc，可以在不同仿真工具之间自由切换，vcs 也有自己的库但是只能在vcs 中使用，不能在xrun 和子门子的EDA 仿真工具中使用。下图是一个典型的sv和sc协同验证环境的testbench。systemverilog大家都比较熟悉了，UVM就是基于sv创建的一个验证方法学的库。但是systemc用的就比较少。一般情况下，systemc用于：事务级别建模和验证HW / SW协同设计SOC架构分析和优化sv和sc协同验证环境，主要应用于：使用SystemC TL模型作为SystemVerilog测试平台中的参考模型（可重用）通过常用的SV测试平台确保RTL和SystemC TL模型的一致性SC和SV具有互操作性SC模块可以实例化SV，反之亦然具有混合语言组件的单模块层次结构SC和SV调度程序需要统一的语义混合语言系统应该像使用单一语言一样工作引脚级：SC信号可以绑定到SV端口，反之亦然支持标准转化集使用简单，但很少能匹配设计流程要求TL：SC调用SV任务/函数，SV调用SC方法符合大多数设计流程要求更高的仿真和建模效率那么怎么将SV和SC两种不同的语言连接起来呢？大家都知道dpi可以作为c和sv之间互相访问的桥梁，那么它作为SV和SC之间的桥梁够用吗？当然不够。DPI只能调用非阻塞方法/任务/函数，但是不能调用耗时的任务/方法。仅指定C接口，而不能指定C ++，而不能指定SystemCDPI不能用于遍历SystemC层次结构，处理实例或对象不容易实现DPI构建为与单线程非时序的C程序的接口Mentor也开源了UVM Connect的库。UVM Connect是一个基于开源UVM的库，提供TLM1和TLM2连接以及SystemC和SystemVerilog UVM模型和组件之间的对象传递。它还提供了一个UVM Command API，用于从SystemC（或C或C ++）访问和控制UVM仿真。 UVM Connect允许您在UVM验证中重用SystemC架构模型作为参考模型和/或重用SystemVerilog UVM代理来验证SystemC中的模型。它还有效地扩展了您的VIP产品组合，因为您现在可以使用两种语言访问VIP。通过UVM Connect，您可以轻松开发集成的验证环境，从而充分利用每种语言的优势，最大限度地提高验证效率。UVM版本2.3增加了新的“快速打包程序”功能，可在通过TLM2连接传递通用有效负载时提高性能。它们还增加了对无限数据有效负载的支持以及对配置扩展的有限支持。附录：SV和SC语言之间的数据类型映射原文链接：https://blog.csdn.net/zhajio/article/details/81780576
- 2025年06月06日
- 6 阅读
- 0 评论
- 0 点赞

bennyhe

378 文章数

31 评论量

最新回复

gvim+tmux 和vscode+neovim 的ide 模式 - 欢迎来到半导体与芯片的世界
2025-11-18

[...]vscode 界面安装的插件：vscode+neovim 设置参考这篇文档：http://bennyhe.cn/index.php/archives/327/gvim 的界面：常用功能都有，文件浏览、语法高亮、彩虹括号、括号自动补齐、输入关键词提示，ctag 函数跳转、文档状态、多terminal（tmux）集成等等常用功能。terminal界面采用tmux，配合clipper 工具可以和gvim[...]
各个系统下效率提升工具 - 欢迎来到半导体与芯片的世界
2025-10-27

[...]windowsutools 快速启动软件文件夹或者自定义功能uTools 是一个极简、插件化的现代桌面软件，通过自由选配丰富的插件，打造得心应手的工具集合。通过快捷键（默认 alt + space ）就可以快速呼出这个搜索框。你可以往输入框内粘贴文本、图片、截图、文件、文件夹等等，能够处理此内容的插件也早已准备就绪，统一的设计风格和操作方式，助你高效的得到结果quicker 自动化鼠标键盘工具，可[...]
各个os下效率提升工具 - 欢迎来到半导体与芯片的世界
2025-10-27

[...]windowsutools 快速启动软件文件夹或者自定义功能uTools 是一个极简、插件化的现代桌面软件，通过自由选配丰富的插件，打造得心应手的工具集合。通过快捷键（默认 alt + space ）就可以快速呼出这个搜索框。你可以往输入框内粘贴文本、图片、截图、文件、文件夹等等，能够处理此内容的插件也早已准备就绪，统一的设计风格和操作方式，助你高效的得到结果quicker 自动化鼠标键盘工具，可[...]
gvim+tmux 和vscode+neovim 的ide 模式 - 欢迎来到半导体与芯片的世界
2025-10-10

[...]vscode 界面按照的插件：vscode+neovim 设置参考这篇文档：http://bennyhe.cn/index.php/archives/327/gvim 的界面：terminal界面采用tmux，配合clipper 工具可以和gvim 文本窗口互相粘贴，可以分页多个terminal。gvim 按照的插件~/.vim/ 下文件夹结构~/.vim/ 下文件（插件）acp.vim [...]
C语言实现面向对象三大特性 : 封装、继承、多态（2） - 欢迎来到半导体与芯片的世界
2025-08-27

[...]http://bennyhe.cn/index.php/archives/1709/这个公众号写的例子解释得不清楚，让deepseek帮忙写了一个例子，加上解释。以下是一个使用C语言模拟面向对象编程的完整示例，通过结构体和函数指针实现封装、继承和多态三大特性：代码如下:#include <stdio.h>[...]

标签云

2022 - 2025 © Bennyhe 粤ICP备2022129950号-1

已运行 00 天 00 时 00 分 00 秒

RSS MAP