用MATLAB生成*.hex（QUARTUS II）内存初始化文件 (2008-06-06 19:58:42)

/data_width:存储器输出数据的位宽
//address_width：有多少根地址线
//filer_path：hex文件路径
//filew_path：verilog文件的路径
function gene_ram(data_width,address_width,filer_path,filew_path)
pidr=fopen(filer_path,'r');
pidw=fopen(filew_path,'w');
fprintf(pidw,'module mc8051_rom,\n') ;
fprintf(pidw,' rom_adr_i,\n');
fprintf(pidw,' clk,\n');
fprintf(pidw,' rom_data_o,\n');
fprintf(pidw,' input[%d:0] rom_adr_i;\n',address_width-1);
fprintf(pidw,' input clk;\n');
fprintf(pidw,' output[%d:0] rom_data_o;\n',data_width-1);
fprintf(pidw,'\n');
fprintf(pidw,' reg[%d:0] rom_data_o;\n',data_width-1);
fprintf(pidw,'\n');
fprintf(pidw,' always @(posedge clk) begin\n');
fprintf(pidw,' case(rom_adr_i)\n');
tline = fgetl(pidr);
tline = fgetl(pidr);
while 1
tline = fgetl(pidr);/
if ~ischar(tline), break, end
str_length = hex2dec(tline(2:3));
if str_length ~= 0
address = tline(4:7);
address_dec = hex2dec(address);
address = dec2hex(address_dec);
for i = 1:2:str_length*20
h_data=tline(i+9:i+10);
fprintf(pidw,' %d\''h%s : rom_data_o <= %d\''h%s;\n',address_width,address,data_width,h_data);
address_dec = hex2dec(address);
address_dec =address_dec +1;
address = dec2hex(address_dec);
end
end
end
fprintf(pidw,' default : rom_data_o <= %d\''h0;\n',data_width);
fprintf(pidw,' endcase\n');
fprintf(pidw,' end\n');
fprintf(pidw,'endmodule\n');
fclose(pidw);
fclose(pidr);